DDR Unbuffered DIMM 184edge connector pads.
Double Data Rate architecture.
Clock frequency: 133/166/200 MHz.
Data Rate: 266/333/400 MHz.
JEDEC standard.
2 or 1 Banks to be operated simultaneously or independently.
SSTL-2 interface.
Voltage Support 2.5-2.8 Volts
Operation Environment: 0-70¢J.
MRS cycle with address key program
- CAS latency: 2, 2.5 (clock)
- Burst length: 2,4,8.
- Burst type: sequential & interleave.
2 variations of refresh Auto Refresh.
Self refresh.